Title :
STI/LOCOS compatible LDMOS structure in standard CMOS
Author :
Ramos, J. ; Steyaert, M.
Author_Institution :
Dept. Elektrotechniek, Katholieke Univ. Leuven, Heverlee, Belgium
Abstract :
A novel high-voltage transistor structure compatible with shallow trench isolation and local oxidation of silicon is described. This device, which can be implemented in a standard CMOS process, is capable of handling high voltages without destruction. A duplication of the breakdown voltage was measured.
Keywords :
CMOS integrated circuits; isolation technology; oxidation; power MOSFET; semiconductor device breakdown; CMOS process; LDMOS structure; LOCOS; STI; breakdown voltage; high-voltage transistor;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:20030916
