DocumentCode :
823313
Title :
Analogue boundary scan architecture for DC and AC testing
Author :
Lee, Kuen-Jong ; Lee, Tian-Pao ; Wen, Rong-Chang ; Lin, Zhe-Yi
Author_Institution :
Dept. of Electr. Eng., Nat. Cheng Kung Univ., Tainan, Taiwan
Volume :
32
Issue :
8
fYear :
1996
fDate :
4/11/1996 12:00:00 AM
Firstpage :
704
Lastpage :
705
Abstract :
A new mixed-mode boundary scan architecture is developed. The digital part of this architecture complies with the IEEE Std 1149.1. For the analogue part, we propose a new boundary scan cell design and define four analogue test instructions. The control signals for each instruction are also described
Keywords :
boundary scan testing; mixed analogue-digital integrated circuits; standards; AC testing; DC testing; IEEE Std 1149.1; analogue boundary scan architecture; analogue test instructions; cell design; control signals; mixed-mode boundary scan architecture; test cells;
fLanguage :
English
Journal_Title :
Electronics Letters
Publisher :
iet
ISSN :
0013-5194
Type :
jour
DOI :
10.1049/el:19960501
Filename :
491038
Link To Document :
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