DocumentCode
823722
Title
Scalable model for predicting the effect of negative bias temperature instability for reliable design
Author
Bhardwaj, S. ; Wang, W. ; Vattikonda, R. ; Cao, Y. ; Vrudhula, S.
Author_Institution
Synopsys Inc., Mountain View, CA
Volume
2
Issue
4
fYear
2008
Firstpage
361
Lastpage
371
Abstract
The authors present a predictive model for the negative bias temperature instability (NBTI) of PMOS under both short term and long term operation. On the basis of the reaction-diffusion mechanism, this model accurately captures the dependence of NBTI on the oxide thickness (t ox), the diffusing species (H or H 2) and other key transistor and design parameters. In addition, a closed form expression for the threshold voltage change (DeltaVth) under multiple cycle dynamic operation is derived. Model accuracy and efficiency were verified with 180, 130 and 90 nm silicon data. The impact of NBTI on the delay degradation of a ring oscillator and the various metrics of the SRAM such as its data retention voltage, read and hold margins, as well as read and write delay, is also investigated.
Keywords
MOSFET; semiconductor device reliability; PMOS; negative bias temperature instability; reliable design;
fLanguage
English
Journal_Title
Circuits, Devices & Systems, IET
Publisher
iet
ISSN
1751-858X
Type
jour
DOI
10.1049/iet-cds:20070225
Filename
4586291
Link To Document