DocumentCode :
8245
Title :
Customised soft processor design: a compromise between architecture description languages and parameterisable processors
Author :
Vakili, Sattar ; Langlois, J. M. Pierre ; Bois, Guy
Author_Institution :
Dept. of Comput. Eng., Ecole Polytech. de Montreal, Montreal, QC, Canada
Volume :
7
Issue :
3
fYear :
2013
fDate :
May-13
Firstpage :
122
Lastpage :
131
Abstract :
Processor customisation is an effective technique to enhance performance across an application domain. In this study, the authors present a new customised soft processor development environment called polytechnique customised soft processor (PolyCuSP), which bridges the gap between architecture description languages (ADLs) and extensible soft processors. The main objective of this environment is to facilitate rapid design space exploration while preserving a wide range of customisation flexibility. For this purpose, PolyCuSP offers full flexibility in instruction-set description, while limiting the datapath customisation to a predefined set of tunable microarchitectural parameters. The environment avoids extensive datapath description that is unnecessary for usual microarchitectural customisation techniques in order to simplify the development process. A new XML-based description format is introduced for instruction-set modelling. Experimental results evaluate and compare the design and customisation complexities offered by PolyCuSP with competitive approaches. Results demonstrate the efficiency of applying customisation techniques in the proposed environment. For the Sobel edge detection algorithm, the results show that microarchitectural tuning and instruction-set architecture customisation improve the performance-per-cost ratio by an average of 44 and 27%, respectively. Furthermore, in a case study of a tone-mapping algorithm, PolyCuSP achieves an average improvement of 38% in performance-per-cost ratio over an ADL-based design applying the same customisations.
Keywords :
embedded systems; field programmable gate arrays; hardware description languages; instruction sets; logic design; ADL; FPGA-based embedded system design; PolyCuSP environment; Sobel edge detection algorithm; XML-based description format; architecture description language; customisation complexity; customisation flexibility; customised soft processor development environment; datapath customisation; design complexity; design space exploration; extensible markup language; field programmable gate array; instruction-set description; instruction-set modelling; microarchitectural customisation technique; microarchitectural parameter; parameterisable processor; performance-per-cost ratio; polytechnique customised soft processor; processor customisation; soft processor design; tone-mapping algorithm;
fLanguage :
English
Journal_Title :
Computers & Digital Techniques, IET
Publisher :
iet
ISSN :
1751-8601
Type :
jour
DOI :
10.1049/iet-cdt.2012.0088
Filename :
6547084
Link To Document :
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