Multilevel verification of MOS circuits

Author

Weise, Daniel

Author_Institution

Comput. Syst. Lab., Stanford Univ., Stanford, CA, USA

Volume

9

Issue

4

fYear

1990

fDate

4/1/1990 12:00:00 AM

Firstpage

341

Lastpage

351

Abstract

The ideas behind Silica Pithecus, a program for verifying synchronous digital MOS VLSI circuits, are described. Silica Pithecus accepts the schematic of an MOS VLSI circuit, declarations of the logical relationships between the input signals, and a specification of the intended digital behavior of the circuit. If the circuit fails to meet its specification, Silica Pithecus returns to the designer the reason it fails to do so. Unlike previous verification systems, which used digital models of MOS components, Silica Pithecus employs a realistic electrical model. It operates hierarchically, interactively, and incrementally. The key idea is to generate and use constraints for verification. Constraints are predicates that restrict the input signals a circuit accepts. Employing explicit constraints has many benefits. First, they enable hierarchical verification, which allows large circuits to be verified. Second, errors can be pinpointed and explained to the designer. Third, all constraints (at the electrical level) can be algorithmically and automatically generated

Keywords

MOS integrated circuits; VLSI; circuit CAD; circuit analysis computing; integrated logic circuits; logic CAD; MOS VLSI circuit; Silica Pithecus; computer aided technique; explicit constraints; hierarchical verification; large circuits; realistic electrical model; synchronous digital circuits; verification systems; Computer bugs; Digital circuits; Latches; Signal design; Signal generators; Silicon compounds; Very large scale integration;

fLanguage

English

Journal_Title

Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on

Publisher

ieee

ISSN

0278-0070

Type

jour

DOI

10.1109/43.45866

Filename

45866