DocumentCode
824802
Title
An improved two-way partitioning algorithm with stable performance [VLSI]
Author
Cheng, Chung-Kuan ; Wei, Yen-Chuen A.
Author_Institution
Dept. of Comput. Sci. & Eng., California Univ., San Diego, CA, USA
Volume
10
Issue
12
fYear
1991
fDate
12/1/1991 12:00:00 AM
Firstpage
1502
Lastpage
1511
Abstract
A two-way partitioning algorithm is presented that significantly improves on the highly unstable results typically obtained from the traditional Kernighan-Lin-based algorithms. The algorithm groups highly connected components into clusters and rearranges the clusters into two final subsets with specified sizes. It is known that the grouping operations reduce the complexity, and thus improve the results, of partitioning very large circuits. However, if the grouping is inappropriate, the partitioning results may degenerate. To prevent degeneration, a ratio cut approach is used to do the grouping. By a series of experiments based on the tradeoff between cut weight and CPU time, the value which controls the resultant number of groups is determined. Good experimental results have been observed for cut weight and CPU time
Keywords
VLSI; circuit layout CAD; integrated circuit technology; stability; CAD; CPU time; IC layout design; VLSI; ratio cut approach; stable performance; two-way partitioning algorithm; very large circuits; Central Processing Unit; Clustering algorithms; Fabrication; Integrated circuit technology; Joining processes; Partitioning algorithms; Silicon; Vents; Very large scale integration; Wires;
fLanguage
English
Journal_Title
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher
ieee
ISSN
0278-0070
Type
jour
DOI
10.1109/43.103500
Filename
103500
Link To Document