The development of a memory card system for a digital still camera using a 4 Mbit NAND-EEPROM

Author

Yoshioka, Shimpei ; Konishi, Kazuo ; Sasaki, Minoru ; Terasak, Setsuo ; Maruyama, Koji

Author_Institution

Toshiba Corp., Tokyo, Japan

Volume

38

Issue

4

fYear

1992

fDate

11/1/1992 12:00:00 AM

Firstpage

824

Lastpage

830

Abstract

A card which is compatible with an SRAM memory card and can store a large amount of image data at low cost without battery backup is described. This card incorporates 4-MBit NAND-EEPROMs, a custom designed gate array, and an 8-bit microprocessor. The card utilizes the following techniques: (1) a byte writing method to realize byte writing for header data; (2) an automatic erasing method to reduce apparent writing time; (3) automatic command writing on the NAND-EEPROM, executed within the card without burdening the camera; and (4) a block substitution method for recovering local cell error. These functions can be executed automatically within the card. Accordingly, the present camera system can utilize the card without any limitations caused by the chip architecture of the NAND-EEPROM

Keywords

EPROM; error correction; memory architecture; video cameras; 4 Mbit; 8 bits; NAND-EEPROM; apparent writing time; automatic command writing; automatic erasing method; block substitution method; byte writing method; chip architecture; custom designed gate array; digital still camera; header data; image data; local cell error recovery; memory card system; microprocessor; Batteries; Consumer electronics; Costs; Digital cameras; Digital recording; EPROM; Image storage; Random access memory; Semiconductor memory; Writing;

fLanguage

English

Journal_Title

Consumer Electronics, IEEE Transactions on

Publisher

ieee

ISSN

0098-3063

Type

jour

DOI

10.1109/30.179972

Filename

179972