Radiation Hardened P-Surface Channel CCD´s

A process for total dose hardening of surface p-channel CCD´s with overlapping polysilicon gates has been developed by optimizing the process steps associated with the gate oxides and polysilicon gates. 16-bit shift registers fabricated with this process can be operated up to 1×106 rads (Si) with threshold voltage shifts of ¿ 2V for the buried gates, and ¿ 1.5V for the surface gates on the best devices fabricated. The charge transfer efficiency for the devices with -10V gate bias during irradiation is unchanged after 1×106 rads (Si), but drops to 0.999 for the devices with OV gate bias during irradiation. The average dark current increases to only 1.75 times the initial value after 1×106 rads (Si) for devices with -10V gate bias during irradiation, and to 4 times the initial value for the devices with OV gate bias. No additional dark current spikes are observed up to 1×106 rads (Si). These results represent a very large improvement in hardness over typical CCD´s.