An improved analytical short-channel MOSFET model valid in all regions of operating for analog/digital circuit simulation

Author

Chow, Hwang-Cherng ; Feng, Wu-Shing ; Kuo, James B.

Author_Institution

Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan

Volume

11

Issue

12

fYear

1992

fDate

12/1/1992 12:00:00 AM

Firstpage

1522

Lastpage

1528

Abstract

An improved analytical model for short-channel MOSFETs which is valid in all regions of operation with both the continuous drain current and the output conductance by introducing a source-drain series resistance dependent scaling factor is proposed for analog/digital circuit simulation. This model considers all second-order effects for an accurate determination of the pinchoff point location without internal numerical iterations. Comparisons with experimental data for submicron devices confirm the model validity. Furthermore, a simple interpolation is also presented to maintain the continuous slope of the output conductance and its effect on the drain current is demonstrated to be acceptable

Keywords

circuit analysis computing; insulated gate field effect transistors; interpolation; semiconductor device models; analog/digital circuit simulation; analytical model; continuous drain current; drain current; interpolation; output conductance; scaling factor; second-order effects; short-channel MOSFET; source-drain series resistance; submicron devices; Analytical models; Channel bank filters; Circuit simulation; Digital circuits; Immune system; Interpolation; MOSFET circuits; Solid modeling; Very large scale integration; Voltage;

fLanguage

English

Journal_Title

Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on

Publisher

ieee

ISSN

0278-0070

Type

jour

DOI

10.1109/43.180265

Filename

180265