A DC-4-GHz true logarithmic amplifier: theory and implementation

Author

Holdenried, Chris D. ; Haslett, James W. ; McRory, John G. ; Beards, R. Douglas ; Bergsma, A.J.

Author_Institution

Dept. of Electr. & Comput. Eng., Calgary Univ., Alta., Canada

Volume

37

Issue

10

fYear

2002

fDate

10/1/2002 12:00:00 AM

Firstpage

1290

Lastpage

1299

Abstract

A 40 dB dynamic range, DC-4 GHz parallel-summation logarithmic amplifier is presented in this paper. The amplifier realizes a piecewise approximation to an exact logarithmic response. A design procedure that yields breakpoints on the exact response is described, along with delay-matching networks for parallel-summation logarithmic amplifiers. The amplifier was constructed in a 35 GHz silicon bipolar process, has ±5 dB logarithmic conformity over a DC-4 GHz bandwidth and has rise and fall times of 100 ps. The integrated circuit has dimensions of 2×2 mm² and consumes 750 mW from a -5 V supply.

Keywords

MMIC amplifiers; bipolar MMIC; bipolar analogue integrated circuits; delay circuits; integrated circuit design; wideband amplifiers; -5 V; 0 to 4 GHz; 100 ps; 35 GHz; 4 GHz; 750 mW; Si; Si bipolar process; delay-matching networks; design procedure; dynamic range; log amplifiers; logarithmic response; parallel-summation logarithmic amplifier; piecewise approximation; Bandwidth; Circuits; Dynamic range; Optical amplifiers; Optical distortion; Optical fiber amplifiers; Optical modulation; Optical receivers; Signal generators; Stimulated emission;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/JSSC.2002.803059

Filename

1035943