DocumentCode
82722
Title
An Analysis of the PLLs With Secondary Control Path
Author
Golestan, Saeed ; Ramezani, Mahdi ; Guerrero, Josep M.
Author_Institution
Dept. of Electr. Eng., Islamic Azad Univ., Abadan, Iran
Volume
61
Issue
9
fYear
2014
fDate
Sept. 2014
Firstpage
4824
Lastpage
4828
Abstract
The phase-locked loops (PLLs) are widely used in different areas of applications particularly for synchronization and control purposes in grid connected applications. A major challenge associated with the PLLs is how to improve their dynamic performance without jeopardizing their stability and filtering capability. Recently, some approaches based on adding a secondary control path (SCP) to the PLL structure have been proposed to deal with this challenge. The objective of this paper is to briefly analyze these approaches. The study starts with an overview of the PLLs with SCP. The paper proceeds with the small-signal modeling of some of these PLLs, which significantly simplifies the analysis. Using these models, the effects of adding the SCP on the PLL structure are studied. The obtained results show that the SCP may not be a practical approach to improve the PLL dynamic performance mainly because it aggravates the stability problem.
Keywords
closed loop systems; control system synthesis; phase locked loops; power grids; power system control; synchronisation; PLL analysis; SCP; grid connected application control; phase-locked loops; secondary control path; small-signal modeling; stability; synchronization; Educational institutions; Mathematical model; Phase locked loops; Power system stability; Stability analysis; Tracking loops; Transfer functions; Dynamic performance; phase-locked loop (PLL); synchronization;
fLanguage
English
Journal_Title
Industrial Electronics, IEEE Transactions on
Publisher
ieee
ISSN
0278-0046
Type
jour
DOI
10.1109/TIE.2013.2289904
Filename
6656834
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