DocumentCode :
828239
Title :
Statistical profiling of SILC spot in flash memories
Author :
Ielmini, Daniele ; Spinelli, Alessandro S. ; Lacaita, Andrea L. ; Visconti, Angelo
Author_Institution :
Dipt. di Elettronica e Inf., Politecnico di Milano, Italy
Volume :
49
Issue :
10
fYear :
2002
fDate :
10/1/2002 12:00:00 AM
Firstpage :
1723
Lastpage :
1728
Abstract :
A new experimental technique for evaluating the position of the oxide weak spot responsible for the stress-induced leakage current (SILC) in flash memories is presented. The oxide field along the channel is modified by drain biasing, and the gate current is then monitored. The position of the leakage spot can be determined by the shift in the gate current-voltage (I-V) characteristics. Experimental results on flash memory arrays reveal a strong localization of SILC in correspondence of the drain junction, due to the cooperation effects of program/erase (P/E) operations. The technique can be used to optimize the P/E conditions for maximum device reliability.
Keywords :
failure analysis; flash memories; hot carriers; integrated circuit reliability; integrated circuit testing; leakage currents; EPROM; Fowler-Nordheim tunneling; SILC localization; SILC spot statistical profiling; channel oxide field; channel-hot-electron injection; drain biasing; drain junction; failure analysis; flash memories; flash memory arrays; gate I-V characteristics shift; gate current monitoring; oxide weak spot position; program/erase operations cooperation effects; reliability optimization; reliability testing; stress-induced leakage current; Area measurement; Current measurement; Data mining; Failure analysis; Flash memory; Helium; Leakage current; MOSFETs; Monitoring; Testing;
fLanguage :
English
Journal_Title :
Electron Devices, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9383
Type :
jour
DOI :
10.1109/TED.2002.803636
Filename :
1036079
Link To Document :
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