DocumentCode :
829374
Title :
Warpage Measurement of Board Assemblies Using Projection MoirÉ System With Improved Automatic Image Segmentation Algorithm
Author :
Tan, Wei ; Ume, I. Charles
Author_Institution :
Sch. of Mech. Eng., Georgia Inst. of Technol., Atlanta, GA
Volume :
31
Issue :
3
fYear :
2008
Firstpage :
447
Lastpage :
453
Abstract :
Out-of-plane displacement (warpage) has been a major reliability concern for board-level electronic packaging. Printed wiring board (PWB) and component warpage results from coefficient of thermal expansion (CTE) mismatch among the materials that make up the printed wiring board assembly (PWBA). Warpage occurring during surface-mount reflow process and normal operations may lead to serious reliability problems. PWB/PWBA warpage can be measured by many different optical techniques, among which moire methods have emerged as real-time, noncontact, full-field, and superior techniques with high resolutions. In this paper, a warpage measurement system based on the projection moire technique and improved automatic image segmentation algorithm is presented. In order to use the projection moire system to accurately and separately determine the warpage of a PWB and assembled chip packages in a PWBA, a novel automatic image segmentation algorithm was developed. The algorithm uses mask image models to detect and segment assembled packages from the PWB, and defines their warpage, respectively. This approach resulted in higher resolution and processing rate compared to the original algorithm based on snakes. The warpage of the PWB and chip packages in a PWBA can be successfully determined individually irrespective of the package locations and orientations. Real-time continuous and composite Hermite surface models were generated to evaluate the PWB warpage values underneath packages. The improved segmentation algorithm was integrated with the projection moire system so that the system is able to accurately evaluate the warpage of the PWB and chip packages in a PWBA, respectively.
Keywords :
electronics packaging; image segmentation; moire fringes; printed circuit testing; reliability; automatic image segmentation algorithm; board assemblies; board-level electronic packaging; composite Hermite surface model; mask image model; out-of-plane displacement; printed wiring board; projection moire system; real-time continuous model; segment assembled packages; thermal expansion; warpage measurement; Assembly systems; Electronic components; Electronic packaging thermal management; Electronics packaging; Gratings; Image segmentation; Semiconductor device measurement; Thermal expansion; Thermomechanical processes; Wiring; Mask image model; projection moirÉ system; warpage;
fLanguage :
English
Journal_Title :
Advanced Packaging, IEEE Transactions on
Publisher :
ieee
ISSN :
1521-3323
Type :
jour
DOI :
10.1109/TADVP.2008.927855
Filename :
4591492
Link To Document :
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