Design and VLSI implementation of a digital audio-specific DSP core for MP3/AAC

Author

Bang, Kyoung Ho ; Jeong, Nam Hun ; Kim, Joon Seok ; Park, Young Cheol ; Youn, Dae Hee

Author_Institution

Dept. of Electr. & Electron. Eng., Yonsei Univ., Seoul, South Korea

Volume

48

Issue

3

fYear

2002

fDate

8/1/2002 12:00:00 AM

Firstpage

790

Lastpage

795

Abstract

We present a digital audio-specific DSP core designed for a dual decoder for MPEG/audio layer-3 (MP3) and MPEG-2 advanced audio coding (AAC). The processing core is a 20-bit fixed-point programmable DSP having an architecture suitable for audio signal processing. It supports special instructions such as UNPACK and Huffman as well as general arithmetic and logical instructions including pipelined-MAC. All instructions are completed within a single cycle. The DSP core is realized in a 0.35 μm 3.3 V CMOS technology and operates at 40 MHz. The implemented DSP core with a dedicated hardware accelerator can decode MP3 using only 13.33 MIPS and AAC using only 16.9 MIPS with high efficiency.

Keywords

CMOS digital integrated circuits; VLSI; audio coding; decoding; digital signal processing chips; fixed point arithmetic; integrated circuit design; pipeline arithmetic; 0.35 micron; 13.33 MIPS; 16.9 MIPS; 3.3 V; 40 MHz; AAC; CMOS technology; MP3; MPEG-2 advanced audio coding; MPEG/audio layer-3; VLSI implementation; audio signal processing; digital audio-specific DSP core; dual audio decoder; fixed-point programming; pipelined-MAC; Application specific integrated circuits; Audio coding; CMOS technology; Decoding; Digital audio players; Digital signal processing; Energy consumption; Hardware; Signal processing algorithms; Very large scale integration;

fLanguage

English

Journal_Title

Consumer Electronics, IEEE Transactions on

Publisher

ieee

ISSN

0098-3063

Type

jour

DOI

10.1109/TCE.2002.1037076

Filename

1037076