DocumentCode :
831325
Title :
Hardened CMOS/SOS LSI Circuits for Satellite Applications
Author :
Shumake, D.P. ; Kempke, R.A. ; Aubuchon, K.G.
Author_Institution :
Hughes Aircraft Company El Segundo, California
Volume :
24
Issue :
6
fYear :
1977
Firstpage :
2177
Lastpage :
2180
Abstract :
The aluminum gate complementary MOS silicon on sapphire (CMOS/SOS) technology has been applied to the development of three radiation hardened large scale integration (LSI) microcircuits for satellite applications. The read control, write control, and multiplexer control LSI circuits range in complexity from 550 to more than 750 gates each (2000 to 3000 transistors). This discussion presents the results of the total dose radiation testing on these circuits to levels up to, and including, 1 x 107 rads(Si). For the worst case LSI device, the minimum operating supply voltage increased from approximately 2 volts to only about 6 volts when irradiated to 107 rads. This is well below the intended nominal operating supply voltage of 10 volts. These radiation-induced shifts in minimum operating voltage are related to threshold shifts in the P-channel devices. Results of P-channel threshold shifts for three different gate bias conditions during irradiation are presented. The worst case (+10 volts bias) was eliminated in the LSI designs to optimize radiation hardness. This paper also discusses the recovery of device parameters toward their initial pre-irradiation values. Recovery occurred over a period of several days after irradiation due to annealing of trapped charge in the gate oxide and at the silicon-sapphire interface.
Keywords :
Aluminum; CMOS technology; Circuit testing; Design optimization; Large scale integration; Multiplexing; Radiation hardening; Satellites; Silicon; Threshold voltage;
fLanguage :
English
Journal_Title :
Nuclear Science, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9499
Type :
jour
DOI :
10.1109/TNS.1977.4329187
Filename :
4329187
Link To Document :
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