DocumentCode :
832065
Title :
Control unit synthesis from a high-level language
Author :
Rotman, Alan ; Ginosar, Ran
Author_Institution :
Dept. of Electr. Eng., Technion-Israel Inst. of Technol., Haifa, Israel
Volume :
12
Issue :
1
fYear :
1993
fDate :
1/1/1993 12:00:00 AM
Firstpage :
162
Lastpage :
167
Abstract :
Control Unit Synthesizer (CUS) is a language and a synthesizer for generating VLSI layouts of control units from a user´s functional specification. CUS synthesizes multiple finite state machines (FSMs), which are organized hierarchically and interconnected by global variables and a FORK/JOIN protocol. High-level constructs like WHILE loops. FOR loops, registered and nonregistered variables, arbitrarily complex Boolean expressions, and nested statements allow the user to write descriptions of FSMs in a natural manner. The generated circuit is simulated at the logic-level using symbolic names. The resulting layout size is similar or better than manual layout
Keywords :
VLSI; circuit layout CAD; finite state machines; high level languages; logic CAD; program compilers; Control Unit Synthesizer; FOR loops; FORK/JOIN protocol; FSM; VLSI layouts; WHILE loops; complex Boolean expressions; functional specification; high-level language; multiple finite state machines; nested statements; nonregistered variables; registered variables; Boolean functions; Circuit simulation; Data structures; Design automation; Digital signal processing; High level languages; Petroleum; Radio access networks; Utility programs; Very large scale integration;
fLanguage :
English
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
0278-0070
Type :
jour
DOI :
10.1109/43.184853
Filename :
184853
Link To Document :
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