• DocumentCode
    832583
  • Title

    One structure for fractional delay filter with small number of multipliers

  • Author

    Jovanovic-Dolecek, G. ; Diaz-Carmona, J.

  • Author_Institution
    Dept. of Electron., INAOE, Puebla, Mexico
  • Volume
    38
  • Issue
    19
  • fYear
    2002
  • fDate
    9/12/2002 12:00:00 AM
  • Firstpage
    1083
  • Lastpage
    1084
  • Abstract
    A wide-bandwidth, high-resolution fractional delay filter (FDF) structure with a small number of multipliers per output sample and a short coefficient computing time is presented. The proposal is based on the use of a frequency FDF design method up to only half of the Nyquist frequency, in a multirate structure
  • Keywords
    FIR filters; digital arithmetic; digital filters; frequency-domain synthesis; multiplying circuits; FIR filter; finite impulse response filter; fractional delay filter; frequency domain design method; high-resolution filter; multipliers; multirate structure; short coefficient computing time; wide-bandwidth filter;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:20020749
  • Filename
    1038602
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=832583