A high performance multi-channel preamplifier ASIC

Author

Yarema, R.J. ; Zimmerman, T. ; Williams, W. ; Binkley, M. ; Huffman, T. ; Wagner, R.

Author_Institution

Fermi Nat. Accel. Lab., Batavia, IL, USA

Volume

39

Issue

4

fYear

1992

fDate

8/1/1992 12:00:00 AM

Firstpage

742

Lastpage

746

Abstract

A preamplifier application-specific integrated circuit (ASIC) has been designed and built to improve performance of the vertex time projection chamber (VTPC) at Fermilab´s Colliding Detector Facility. Design of the semicustom IC was completed by using a Tektronix QuickChip 2S bipolar linear array. The ASIC had six channels on a chip and provided lower noise, higher gain, lower power, and lower mass packaging than the device which it replaced. Actual performance of the preamplifier was found to match very closely the simulated performance. To reduce the mass of the complete circuit board, bare IC dice were mounted directly on a G-10 substrate using chip-on-board techniques

Keywords

application specific integrated circuits; bipolar integrated circuits; linear integrated circuits; nuclear electronics; position sensitive particle detectors; preamplifiers; proportional counters; CDF detector; G-10 substrate; Tektronix QuickChip 2S bipolar linear array; bare IC dice; chip-on-board techniques; multichannel preamplifier ASIC; preamplifier application-specific integrated circuit; vertex time projection chamber; Application specific integrated circuits; Capacitance; Detectors; Driver circuits; Dynamic range; Noise shaping; Power dissipation; Preamplifiers; Resistors; Temperature;

fLanguage

English

Journal_Title

Nuclear Science, IEEE Transactions on

Publisher

ieee

ISSN

0018-9499

Type

jour

DOI

10.1109/23.159698

Filename

159698