DocumentCode :
83398
Title :
A Class-D Amplifier With Pulse Code Modulated (PCM) Digital Input for Digital Hearing Aid
Author :
Jinho Noh ; Dongjun Lee ; Jun-Gi Jo ; Changsik Yoo
Author_Institution :
Dept. Electron. Eng., Hanyang Univ., Seoul, South Korea
Volume :
48
Issue :
2
fYear :
2013
fDate :
Feb. 2013
Firstpage :
465
Lastpage :
472
Abstract :
A class-D amplifier with pulse code modulated (PCM) digital input is developed for a low-power digital hearing aid. A 16-bit 40-kbps PCM digital input is noise-shaped by a third-order digital sigma-delta modulator (SDM) which provides 1.5-bit digital output. The 1.5-bit digital output of the digital SDM is converted to a three-level analog signal by a simple digital-to-analog converter (DAC) and then applied to an analog SDM. The analog SDM provides pulse density modulated (PDM) signal to drive a power switch. The PDM output is fed back to the input of the analog SDM in order to suppress the noise of the power switch. While the integrators of the analog SDM are implemented with switched-capacitor (SC) circuits for a well-defined frequency response of the modulator loop filter, the feedback path from the power switch output is realized with a continuous-time (CT) integrator for effective noise suppression. The class-D amplifier with PCM digital input has been implemented in a standard 0.13-μm CMOS process. With 160-Ω load of speaker, the maximum output power delivered to the load is 1.14-mW while the efficiency of the power switch is 97-%. The signalmathchar"702D tomathchar"702D noise+distortion ratio (SNDR) and dynamic range (DR) of the class-D amplifier are measured to be 80.6-dB and 87-dB, respectively. The class-D amplifier consumes 0.38-mW from a 1.2-V power supply including the driving power of the power switch.
Keywords :
CMOS integrated circuits; digital-analogue conversion; feedback; frequency response; hearing aids; interference suppression; prosthetic power supplies; pulse code modulation; sigma-delta modulation; space division multiplexing; switches; CT integrator; DAC; PCM digital input; PDM signal; SC circuits; SNDR; analog SDM; bit rate 40 kbit/s; class-D amplifier; continuous-time integrator; digital-to-analog converter; driving power; dynamic range; feedback path; frequency response; low-power digital hearing aid; maximum output power; modulator loop filter; noise suppression; power 0.38 mW; power 1.14 mW; power supply; power switch; pulse code modulated digital input; pulse density modulated signal; resistance 160 ohm; signal-to-noise-distortion ratio; size 0.13 mum; standard CMOS process; storage capacity 1.5 bit; storage capacity 16 bit; switched-capacitor circuits; third-order digital SDM; third-order digital sigma-delta modulator; three-level analog signal; voltage 1.2 V; Auditory system; Modulation; Noise; Phase change materials; Sigma delta modulation; Switches; Switching circuits; CMOS; Class-D amplifier; H-bridge; digital hearing aid; power switching; sigma-delta modulator; signal-to-noise ratio (SNR);
fLanguage :
English
Journal_Title :
Solid-State Circuits, IEEE Journal of
Publisher :
ieee
ISSN :
0018-9200
Type :
jour
DOI :
10.1109/JSSC.2012.2224731
Filename :
6373766
Link To Document :
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