Title :
Time-delay optimization of RSFQ cells
Author :
Intiso, Samuel ; Kataeva, Irina ; Tolkacheva, Elena ; Engseth, Henrik ; Platov, Konstantin ; Kidiyarova-Shevchenko, Anna
Author_Institution :
Microtechnology & Nanoscience Dept., Chalmers Univ. of Technol., Gothenburg, Sweden
fDate :
6/1/2005 12:00:00 AM
Abstract :
This paper presents timing models for RSFQ cells, based on conventional finite-state machines description. Models have been integrated, validated and verified in physical simulations and are suitable for VHDL design. A complete design flow from physical simulation to VHDL simulation, delays optimization, layouting and back-annotation is presented. The correctness of the timing models has been verified in an experiment with 4 × 15 shift register.
Keywords :
circuit layout CAD; circuit optimisation; finite state machines; hardware description languages; logic simulation; superconducting logic circuits; RSFQ cells; VHDL design; delay optimization; finite-state machine description; physical simulations; shift register; standard library; time-delay optimization; timing models; Circuits; Clocks; Delay effects; Fabrication; Hardware design languages; Jitter; Signal processing; Software libraries; Standards development; Timing; RSFQ; VHDL modeling; standard library; time-delay optimization;
Journal_Title :
Applied Superconductivity, IEEE Transactions on
DOI :
10.1109/TASC.2005.849823
