• DocumentCode
    834480
  • Title

    SPAID: an architectural synthesis tool for DSP custom applications

  • Author

    Haroun, Baher S. ; Elmasry, Mohamed I.

  • Author_Institution
    Dept. of Electr. Eng., Waterloo Univ., Ont., Canada
  • Volume
    24
  • Issue
    2
  • fYear
    1989
  • fDate
    4/1/1989 12:00:00 AM
  • Firstpage
    426
  • Lastpage
    435
  • Abstract
    SPAID, a design tool that maps digital signal processing (DSP) algorithms into a multibus VLSI architecture is discussed. Algorithm structure, design style of functional units (FU), and parallelism of the architecture are all explored in the design space. SPAID supports pipelined and multicycle functional units. The synthesized processor is a self-timed element externally, while it is internally synchronous. SPAID explores a wider space, and produces better solutions compared with existing synthesis systems on an elliptic filter benchmark design example. A multibus multifunctional unit processor matched to the implemented algorithm is synthesized using SPAID.<>
  • Keywords
    VLSI; application specific integrated circuits; circuit CAD; digital signal processing chips; logic CAD; parallel architectures; pipeline processing; CAD; DSP custom applications; SPAID; architectural synthesis tool; design tool; digital signal processing; multibus VLSI architecture; multicycle functional units; Algorithm design and analysis; Digital signal processing; Integrated circuit synthesis; Parallel processing; Partitioning algorithms; Signal design; Signal processing algorithms; Signal synthesis; Throughput; Very large scale integration;
  • fLanguage
    English
  • Journal_Title
    Solid-State Circuits, IEEE Journal of
  • Publisher
    ieee
  • ISSN
    0018-9200
  • Type

    jour

  • DOI
    10.1109/4.18604
  • Filename
    18604