Title :
Design and test of a 2-Gbit/s GaAs 16/8-bit MUX/DEMUX pair
Author :
Cheney, Bruce ; Hamilton, Pat ; LaRue, George
Author_Institution :
TriQuint Semicond., Beaverton, OR, USA
fDate :
4/1/1989 12:00:00 AM
Abstract :
A 16/8-b multiplexer/demultiplexer (MUX/DEMUX) pair designed with a GaAs standard cell approach is presented here. The designs feature ECL compatibility and can support data rates up to 2 Gb/s. In addition to reviewing the design aspects of these devices, the development of a high-speed production test system is presented. The devices presented perform parallel/serial and serial/parallel conversion continuously (time-division multiplexing/demultiplexing) at rates up to 2 Gbs/s. A rigorous testing technique using a long pseudorandom bit steam sequence (2/sup 23/-1) and exercising all channels simultaneously is utilized.<>
Keywords :
III-V semiconductors; data communication equipment; digital communication systems; field effect integrated circuits; gallium arsenide; integrated circuit testing; integrated logic circuits; logic testing; multiplexing equipment; production testing; time division multiplexing; 16 bit; 2 Gbit/s; 8 bit; BFL circuit topology; ECL compatibility; GaAs; MUX/DEMUX pair; TDM; buffered FET logic; depletion mode MESFET process; digital IC; high speed data transmission; high-speed production test system; multiplexer/demultiplexer; parallel/serial conversion; pseudorandom bit steam sequence; serial/parallel conversion; standard cell approach; time-division multiplexing; Clocks; Data communication; Digital integrated circuits; Digital systems; Gallium arsenide; Multiplexing; Production systems; Signal generators; System testing; Timing;
Journal_Title :
Solid-State Circuits, IEEE Journal of
