Quick estimation of transient currents in CMOS integrated circuits

A methodology is established for analyzing transient currents in CMOS VLSI circuits without extensive detailed circuit simulations. Equations are presented for the analyzing individual device currents using transistor dimensions, rise/fall times, frequency, and capacitive loading. The concept of effective frequency for various transistor structures is introduced and used for frequency propagation in complex circuits. Simple algorithms are presented for differentiating between simultaneous and nonsimultaneous currents using frequency, propagation delay, and power-bus location. Current flow is analyzed in general for three structures: interconnect, internal power buses, and pad-ring power buses. Individual transistor currents are related to total current in VLSI circuits. Current values and percentage errors are given to various examples. These current estimates can flag serious reliability issues, such as electromigration, or spurious signal noise from excessive power-bus voltage drops