Title :
Compact high-frequency output buffer for testing of analog CMOS VLSI circuits
Author :
Van Peteghem, Peter M. ; Duque-Carrillo, J.F.
Author_Institution :
Dept. of Electr. Eng., Texas A&M Univ., College Station, TX, USA
fDate :
4/1/1989 12:00:00 AM
Abstract :
A compact high-frequency CMOS analog buffer for testing purposes is presented. A prototype integrated in a 3-μm CMOS process drives a 15-pF 10-kΩ load, and shows a bandwidth of more than 30 MHz, a large-signal time to 1% less than 90 ns, and a dynamic range of over 77 dB; power consumption is 2.4 mA per cell. Its small size (less than 0.18 mm2) makes it suitable for monitoring low-capacitance internal nodes of analog or mixed-mode VLSI circuits
Keywords :
CMOS integrated circuits; VLSI; buffer circuits; integrated circuit testing; linear integrated circuits; 3 micron; 30 MHz; CMOS VLSI circuits; analogue circuits; compact design; high-frequency output buffer; mixed mode circuits; monitoring low-capacitance internal nodes; testing; Bandwidth; CMOS analog integrated circuits; CMOS process; Capacitance; Circuit testing; Dynamic range; Energy consumption; Operational amplifiers; Transconductance; Very large scale integration;
Journal_Title :
Solid-State Circuits, IEEE Journal of
