Limitations on performance of Superconductor oversampling ADCs

We discuss several general questions related to the development and optimization of superconductor oversampling modulators. We highlight the importance of specially engineered and parasitic components of the feedback loop. In particular, LR circuits operating as low-pass filters are capable of providing a noticeable SNR improvement and dramatically reducing the dynamic range requirements for used SFQ comparators. On the other hand, the feedback loop delay and time-jitter in timing circuits are able to spoil the potentially extremely high performance of superconductor oversampling ADCs. We also developed a simple formula describing time-jitter in superconductor circuits.