Title :
Hysteretic threshold logic and quasi-delay insensitive asynchronous design
Author :
Neidengard, Mark ; Minch, Bradley A.
Author_Institution :
Dept. of Electr. & Comput. Eng., Cornell Univ., Ithaca, NY, USA
fDate :
10/1/2002 12:00:00 AM
Abstract :
We introduce the class of hysteretic linear-threshold (HLT) logic functions as a novel extension of linear threshold logic, and prove their general applicability for constructing state-holding Boolean functions. We then demonstrate a fusion of HLT logic with the quasi-delay insensitive style of asynchronous circuit design, complete with logical design examples. Future research directions are also identified.
Keywords :
Boolean functions; CMOS logic circuits; VLSI; asynchronous circuits; delays; hysteresis; logic design; threshold logic; CMOS implementation; HLT logic; asynchronous circuit design; digital logic; hysteretic linear-threshold logic functions; logic design; quasi-delay insensitive style; state-holding Boolean functions; Asynchronous circuits; Boolean functions; Clocks; Digital systems; Hysteresis; Logic circuits; Logic design; Logic functions; Signal design; Silicon;
Journal_Title :
Circuits and Systems I: Fundamental Theory and Applications, IEEE Transactions on
DOI :
10.1109/TCSI.2002.803360
