Universal logic design algorithm and its application to the synthesis of two-level switching circuits

The paper presents Thelen´s algorithm (1981) and its application to the (1981) problems which arise in the logic design of two-level multiple-output switching circuits. The paper shows that the logic minimisation procedures, such as the expansion of implicants, detection of essential primes, computation of a minimal cover and reduction of prime implicants can be reduced to one problem and efficiently solved by the use of Thelen´s algorithm. Based on these new procedures the author presents two heuristic minimisation algorithms, an iterative Espresso-like minimiser and a very fast one-pass minimiser, and discusses their results. Both minimiser differ from known algorithms in that minimisation is based on only one fundamental (easily programmable) procedure and minimisation of incompletely specified Boolean functions is performed without use of the don´t care set. Because of the latter aspect the design algorithms are especially suited for the minimisation of logic functions whose don´t care set is large and/or not explicitly given. The algorithms have been successfully tested in the design of finite state machines and are part of the CAD-system CARLOS, a logic synthesis system for the design of multilevel CMOS switching circuits.