DocumentCode
838030
Title
Investigation of critical slowing down in a bistable S-SEED
Author
Clare, B.A. ; Corbett, K.A. ; Grant, K.J. ; Atanackovic, P.B. ; Marwood, W. ; Munch, J.
Author_Institution
Dept. of Phys. & Math. Phys., Adelaide Univ., SA, Australia
Volume
21
Issue
11
fYear
2003
Firstpage
2883
Lastpage
2890
Abstract
A simulation of S-SEED switching based upon experimental data is developed that includes the effect of critical slowing down. The simulation´s accuracy is demonstrated by close agreement with the results from experimental S-SEED switching. The simulation is subsequently used to understand how the phenomenon of critical slowing down applies to switching of an S-SEED and how the effect on photonic analog-to-digital (A/D) converter performance may be minimized.
Keywords
SEEDs; analogue-digital conversion; equivalent circuits; p-i-n photodiodes; quantum well devices; bistable S-SEED switching; clocked switching; critical slowing down; equivalent circuit model; multiple quantum well p-i-n diodes; photonic analog-to-digital converter; sigma-delta architecture; Analog-digital conversion; Circuit simulation; Clocks; Communication switching; Differential equations; P-i-n diodes; Physics; Signal resolution; Switches; Switching converters;
fLanguage
English
Journal_Title
Lightwave Technology, Journal of
Publisher
ieee
ISSN
0733-8724
Type
jour
DOI
10.1109/JLT.2003.817713
Filename
1251114
Link To Document