DocumentCode
838902
Title
Integrated pin electronic for a VLSI test system
Author
Branson, Christopher W.
Author_Institution
Tektronix Inc., Beaverton, OR, USA
Volume
36
Issue
2
fYear
1989
fDate
5/1/1989 12:00:00 AM
Firstpage
185
Lastpage
191
Abstract
Drivers, comparators, active loads, and per-pin timing circuitry for a VLSI test system are placed in two CMOS integrated circuits. This level of integration allows fast, low-capacitance pin electronics to be manufactured at relatively low cost. Novel design and calibration techniques are used to overcome limitations of CMOS technology
Keywords
CMOS integrated circuits; VLSI; automatic test equipment; driver circuits; integrated circuit testing; CMOS integrated circuits; VLSI test system; active loads; calibration; comparators; drivers; low-capacitance pin electronics; per-pin timing circuitry; CMOS integrated circuits; CMOS technology; Circuit testing; Driver circuits; Electronic equipment testing; Integrated circuit testing; Manufacturing; System testing; Timing; Very large scale integration;
fLanguage
English
Journal_Title
Industrial Electronics, IEEE Transactions on
Publisher
ieee
ISSN
0278-0046
Type
jour
DOI
10.1109/41.19067
Filename
19067
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