DocumentCode
838912
Title
Application of junction capacitance measurements to the characterization of solar cells
Author
Recart, Federico ; Cuevas, Andrés
Author_Institution
Australian Nat. Univ., Canberra, ACT, Australia
Volume
53
Issue
3
fYear
2006
fDate
3/1/2006 12:00:00 AM
Firstpage
442
Lastpage
448
Abstract
The quasi-static capacitance-voltage ( C-V) technique measures the dependence of junction capacitance on the bias voltage by applying a slow, reverse-bias voltage ramp to the solar cell in the dark, using simple circuitry. The resulting C-V curves contain information on the junction area and base dopant concentration, as well as their built-in potential. However, in the case of solar cells made on low to medium resistivity substrates and having thick emitters, the emitter dopant profile has to be taken into account. A simple method can then be used to model the complete C-V curves, which, if the base doping is known, permits one to estimate the emitter doping profile. To illustrate the method experimentally, several silicon solar cells with different base resistivities have been measured. They comprise a wide range of areas, surface faceting conditions and emitter doping profiles. The analysis of the quasi-static capacitance characteristics of the flat surface cells resulted in good agreement with independent data for the wafer resistivity and the emitter doping profile. The capacitance in the case of textured surfaces is a function of the effective junction area, which is otherwise difficult to measure, and is essential to understand the emitter and space charge region recombination currents. The results indicate that the effective area of the junction is not as large as the area of the textured surface.
Keywords
capacitance measurement; doping profiles; semiconductor junctions; solar cells; space charge; capacitance characteristics; capacitance-voltage technique; dopant concentration; doping profile; flat surface cells; junction capacitance measurements; photovoltaic cells; recombination currents; solar cells; space charge region; surface faceting; textured surfaces; wafer resistivity; Capacitance measurement; Capacitance-voltage characteristics; Circuits; Conductivity; Doping profiles; Photovoltaic cells; Semiconductor process modeling; Silicon; Surface texture; Voltage; Capacitance; photovoltaic cells; space charge region (SCR);
fLanguage
English
Journal_Title
Electron Devices, IEEE Transactions on
Publisher
ieee
ISSN
0018-9383
Type
jour
DOI
10.1109/TED.2006.870846
Filename
1597519
Link To Document