Extraction of extended BSIM3v3.2.2 model card of vertical 130 nm Si p-MOSFET for circuit simulation

The paper presents parameter extraction techniques to create an extended BSIM3v3.2.2 model card of vertical 130 nm p-MOSFETs for circuit simulation with SPICE. To obtain the overlap and fringing capacitance parameters a parameter extraction methodology based on S-parameter measurements is introduced. This method is applicable to devices without any access to the bulk. Furthermore the lack of gate and complex substrate parasitics modelling in BSIM3v3.2.2 is demonstrated by comparison of several frequency and transient measurements and simulations. These parasitics, which account for the sheet resistance of the gate material and the HF signal coupling from the drain to the source/bulk, were modelled as a simplified subcircuit for IC simulators to improve the prediction of the high-speed behaviour. The validity of the extended model card is shown by good agreement between the on-wafer measurements and simulations up to 20 GHz