• DocumentCode
    838974
  • Title

    Design for testability of analog/digital networks

  • Author

    Wagner, Kenneth D. ; Williams, Thomas W.

  • Author_Institution
    IBM Corp., Poughkeepsie, NY, USA
  • Volume
    36
  • Issue
    2
  • fYear
    1989
  • fDate
    5/1/1989 12:00:00 AM
  • Firstpage
    227
  • Lastpage
    230
  • Abstract
    The testing of analog/digital integrated circuits is difficult since they allow direct access to relatively few signals. Since the probing of component pins is the fundamental chip production test technique (and possibly that of board test as well, i.e. in-circuit test), methods must be found to enhance the controllability and observability of internal signal networks. The authors provide a set of design for testability (DFT) principles that enhance their ability to test these networks when combined with the requisite analog test plans.<>
  • Keywords
    integrated circuit testing; analog/digital integrated circuits; design for testability; internal signal network controllability; testability; Aggregates; Circuit testing; Costs; Design for testability; Digital integrated circuits; Electronic equipment testing; Filters; Logic testing; Operational amplifiers; Oscillators;
  • fLanguage
    English
  • Journal_Title
    Industrial Electronics, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0278-0046
  • Type

    jour

  • DOI
    10.1109/41.19073
  • Filename
    19073