DocumentCode
839617
Title
Circuit design and transmission performance of ISDN basic interface
Author
Okumura, Yasuyuki ; Yamamoto, Takashi
Author_Institution
NTT Corp., Yokosuka, Japan
Volume
6
Issue
3
fYear
1988
fDate
4/1/1988 12:00:00 AM
Firstpage
468
Lastpage
475
Abstract
An LSI-based user-network interface circuit, applicable to a network terminal (NT) for the integrated services digital network (ISDN) basic interface is developed. Adaptive timing extraction, with a simplified polyphase phase-locked oscillator, is introduced into the circuit for application to both point-to-point and passive bus configurations. This circuit does not require any manual adjustment. In addition to the primitives defined by CCITT between layers one and two, a new primitive is adopted for controlling the transmission of information. This primitive avoids premature transmission due to processing delays in the exchange terminal (ET). The above functions are fabricated on a CMOS gate-array LSI chip with 4000 gates. The performance of the interface circuit is confirmed with special attention to transmission and electrical characteristics
Keywords
CMOS integrated circuits; ISDN; large scale integration; CMOS gate-array LSI chip; ISDN basic interface; LSI-based user-network interface circuit; adaptive timing extraction; exchange terminal; information transmission; integrated services digital network; network terminal; passive bus configurations; point-to-point bus configuration; polyphase phase-locked oscillator; primitive; Circuit synthesis; Delay; Electric variables; Hardware; ISDN; Large scale integration; Oscillators; Protocols; Timing; Wiring;
fLanguage
English
Journal_Title
Selected Areas in Communications, IEEE Journal on
Publisher
ieee
ISSN
0733-8716
Type
jour
DOI
10.1109/49.1914
Filename
1914
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