An Accurate Compact Model for On-Chip Vertically Coiled Transformers

An accurate compact model with a physics-based substrate network for on-chip vertically coiled transformers is presented. The metal coils are modeled by a ladder network, which consists of inductors and resistors. The skin and proximity effects are taken into consideration. The capacitive and resistive parasitics between the metal coils and surrounding sidewalls are characterized using R-C networks. A method used to analytically extract the model parameters is proposed. The model renders excellent agreement with the data from both simulation and measurement over the frequency range of 0.1–20 GHz, for a 2:1 vertically coiled transformer manufactured in IBM 90-nm RF-CMOS technology.