DocumentCode
840216
Title
Design and test on chip for EMC
Author
Vargas, F.
Author_Institution
PUCRS
Volume
23
Issue
6
fYear
2006
fDate
6/1/2006 12:00:00 AM
Firstpage
502
Lastpage
503
Abstract
The "Design and test on chip for EMC" panel at the 2006 EMC Europe International Symposium on Electromechanical Compatibility addressed the recent explosion of the portable-electronics market and the increasingly hostile electromagnetic environment in which these systems must operate.
Keywords
Electromagnetic compatibility; Electromagnetic interference; Equivalent circuits; Immunity testing; Integrated circuit modeling; Predictive models; Reliability; Signal to noise ratio; Silicon; Single event transient; EMC; electromagnetic compatibility; electromagnetic environment; portable electronics;
fLanguage
English
Journal_Title
Design & Test of Computers, IEEE
Publisher
ieee
ISSN
0740-7475
Type
jour
DOI
5B19DAE4-83AD-49BB-88BA-5BFCFD68B528
Filename
4016460
Link To Document