• DocumentCode
    840385
  • Title

    Simple approach for generating active-compensated building blocks

  • Author

    Senani, Raj ; Chauhan, Vishakha

  • Author_Institution
    MNR Eng. Coll., Allahabad
  • Volume
    24
  • Issue
    15
  • fYear
    1988
  • fDate
    7/21/1988 12:00:00 AM
  • Firstpage
    916
  • Lastpage
    918
  • Abstract
    A simple approach is presented for synthesising active compensated voltage-controlled-voltage-source (VCVS) circuits (providing negligible magnitude error and negligible phase error) employing three op-amps and a few resistors
  • Keywords
    active networks; compensation; linear network synthesis; VCVS; active compensated voltage-controlled-voltage-source; active compensation; active-compensated building blocks; negligible magnitude error; negligible phase error; three op-amp VCVS circuits;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • Filename
    191633
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=840385