High-speed digital-to-analogue convertor using passive switched-capacitor algorithmic conversion

A purely passive parasitic-compensated switched-capacitor circuit is shown to implement a simple signal conversion algorithm consisting of a mere charge division between equal valued capacitors. Such a circuit is the core of the new digital-to-analogue convertor described, and which is particularly suitable for high-frequency applications. Appropriate design conditions are established to render the overall circuit insensitive to the offset voltage and finite DC gain errors of the amplifier