DocumentCode :
841807
Title :
A new partial scan design based on hard fault distribution analysis
Author :
Chen, P.-C. ; Liu, B.D. ; Wang, J.-F. ; Chen, C.-P.
Author_Institution :
Dept. of Electr. Eng., Nat. Cheng Kung Univ., Tainan, Taiwan
Volume :
139
Issue :
5
fYear :
1992
fDate :
9/1/1992 12:00:00 AM
Firstpage :
457
Lastpage :
463
Abstract :
A post-test generation partial scan method, called hard fault distribution (HFD), is proposed. The goals of this approach are to have the ability of co-operating with any test pattern generator and to obtain maximum fault coverage for the number of flip-flops selected to be scanned. The concept of HFD method consists of the essence of previous relative works such as testability analysis, structure analysis and test generation based methods. This method has been applied to several sequential benchmark circuits by co-operating with a simulation-based directed-search test generator. Experimental results show that this HFD methods is very efficient.
Keywords :
logic design; logic testing; sequential circuits; flip-flops; hard fault distribution analysis; maximum fault coverage; partial scan design; post-test generation; sequential benchmark circuits; simulation-based directed-search test generator; structure analysis; test pattern generator;
fLanguage :
English
Journal_Title :
Computers and Digital Techniques, IEE Proceedings E
Publisher :
iet
ISSN :
0143-7062
Type :
jour
Filename :
159861
Link To Document :
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