• DocumentCode
    841823
  • Title

    A Radiation-Hardened I2L 8 Ã\x97 8 Multiplier Circuit

  • Author

    Doyle, B.R. ; Kreps, S.A. ; van Vonno, N.W. ; Lake, G.W.

  • Author_Institution
    Harris Semiconductor Melbourne, Florida 32901
  • Volume
    26
  • Issue
    6
  • fYear
    1979
  • Firstpage
    4730
  • Lastpage
    4734
  • Abstract
    Development of improved Substrate Fed I2L (SFL) processing has been combined with geometry and fanout constraints to design a radiation hardened LSI 8 × 8 Multiplier. This paper will describe details of the process and circuit design and give resultant electrical and radiation test performance.
  • Keywords
    Circuit synthesis; Circuit testing; Epitaxial layers; Geometry; Limiting; Neutrons; Resistors; Substrates; Surface resistance; Surface topography;
  • fLanguage
    English
  • Journal_Title
    Nuclear Science, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9499
  • Type

    jour

  • DOI
    10.1109/TNS.1979.4330218
  • Filename
    4330218
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=841823