DocumentCode :
842016
Title :
An electrical comparison of multimetal TAB tapes
Author :
Poh, Soon Y. ; Michalka, Timothy L.
Author_Institution :
Digital Equipment Corp., Tewksbury, MA, USA
Volume :
15
Issue :
4
fYear :
1992
fDate :
8/1/1992 12:00:00 AM
Firstpage :
524
Lastpage :
541
Abstract :
An electrical comparison based on signal delay, coupled noise, and reference system noise is conducted for single, double, and triple metal configurations of tape automated bonding (TAB) tape IC packages. Variation in tape size is included and edge rate dependence is investigated. CMOS device technology is assumed. Comparisons are made based on assumptions for basic parameters such as tape features, lead count, and edge rates. The significance of the single metal inner (ILB) and outer (OLB) lead bond tape sections together with substrate dispersion traces, in influencing performance variation with multimetal tapes is illustrated. An improvement is shown in quiet line coupled noise performance for double metal tape over comparable single metal tape, with no similar trends for triple metal tape over double metal tape. Multimetal tapes consistently provide shorter signal delays relative to single metal tapes. Reference noise comparisons do not indicate a clear trend with a number of metal layers. Consistent performance improvement is observed in going to the shorter tapes allowed by finer substrate via pitches
Keywords :
CMOS integrated circuits; semiconductor device noise; tape automated bonding; CMOS device technology; IC packages; ILB; OLB; TAB; coupled noise; double metal tape; edge rate dependence; electrical comparison; fine pitch packages; finer substrate via pitches; multimetal TAB tapes; multimetal tapes; performance improvement; quiet line coupled noise performance; reference system noise; shorter signal delays; shorter tapes; signal delay; single metal tape; substrate dispersion traces; tape automated bonding; tape size; triple metal tape; Automatic testing; Bonding; CMOS technology; Costs; Delay; Integrated circuit noise; Integrated circuit packaging; Multichip modules; Noise reduction; Prototypes;
fLanguage :
English
Journal_Title :
Components, Hybrids, and Manufacturing Technology, IEEE Transactions on
Publisher :
ieee
ISSN :
0148-6411
Type :
jour
DOI :
10.1109/33.159883
Filename :
159883
Link To Document :
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