DocumentCode :
842083
Title :
Multiple Scales Method in VLSI Interconnects Threshold Crossing Time Calculation
Author :
Ligocka, Agnieszka ; Bandurski, Wojciech
Author_Institution :
Fac. of Electron. & Telecommun., Poznan Univ. of Technol., Poznan
Volume :
32
Issue :
2
fYear :
2009
fDate :
5/1/2009 12:00:00 AM
Firstpage :
517
Lastpage :
527
Abstract :
The calculation of the threshold crossing time of the on-chip very large scale integration (VLSI) interconnects is an important part of interconnect simulation. The paper focuses on low-loss on-chip upper layer interconnect simulation. The work presents a new way of calculating the closed form output voltage and threshold crossing time formulas based on differential equation multiple scales solving method. The analytical form of output voltage for the step and ramp excitation is derived and the threshold crossing time formula is proposed. The presented approach of output voltage calculation for a single interconnect is extended to two coupled interconnects.
Keywords :
VLSI; differential equations; integrated circuit interconnections; VLSI interconnects threshold crossing time calculation; differential equation multiple scales solving method; multiple scales method; RLC-model; Interconnects; multiple scales; threshold crossing time; transmission line;
fLanguage :
English
Journal_Title :
Advanced Packaging, IEEE Transactions on
Publisher :
ieee
ISSN :
1521-3323
Type :
jour
DOI :
10.1109/TADVP.2008.2011916
Filename :
4912441
Link To Document :
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