A 0.18-μm SiGe BiCMOS receiver and transmitter chipset for SONET OC-768 transmission systems

Author

Meghelli, Mounir ; Rylyakov, Alexander V. ; Zier, Steven J. ; Sorna, Michael ; Friedman, Daniel

Author_Institution

IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA

Volume

38

Issue

12

fYear

2003

Firstpage

2147

Lastpage

2154

Abstract

A 43-Gb/s receiver (Rx) and transmitter (Tx) chip set for SONET OC-768 transmission systems is reported. Both ICs are implemented in a 0.18-μm SiGe BiCMOS technology featuring 120-GHz f_T and 100 GHz f_max. The Rx includes a limiting amplifier, a half-rate clock and data recovery unit, a 1:4 demultiplexer, a frequency acquisition aid, and a frequency lock detector. Input sensitivity for a bit-error rate less than 10^-9 is 40 mV and jitter generation better than 230 fs rms. The IC dissipates 2.4 W from a -3.6-V supply voltage. The Tx integrates a half-rate clock multiplier unit with a 4:1 multiplexer. Measured clock jitter generation is better than 170 fs rms. The IC consumes 2.3 W from a -3.6-V supply voltage.

Keywords

BiCMOS integrated circuits; SONET; error statistics; jitter; optical communication equipment; phase detectors; sensitivity analysis; synchronisation; transceivers; 0.18 micron; 100 GHz; 120 GHz; 1:4 demultiplexer; 2.4 W; 3.6 V; 40 mV; 43-Gb/s receiver; IC implementation; SONET OC-768 transmission systems; SiGe BiCMOS receiver; SiGe BiCMOS technology; bit-error rate; frequency acquisition aid; frequency lock detector; half-rate clock and data recovery unit; half-rate clock multiplier; input sensitivity; jitter generation; limiting amplifier; phase detector; power dissipation; transmitter chip set; transmitter chipset; BiCMOS integrated circuits; Clocks; Detectors; Frequency; Germanium silicon alloys; Jitter; SONET; Silicon germanium; Transmitters; Voltage;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/JSSC.2003.818571

Filename

1253862