Title :
A fully integrated 43.2-Gb/s clock and data recovery and 1:4 demux IC in InP HBT technology
Author :
Nielsen, S. ; Yen, J.C. ; Srivastava, N.K. ; Rogers, J.E. ; Case, M.G. ; Thiagarajah, R.
Author_Institution :
Inphi Corp., Westlake Village, CA, USA
Abstract :
A 43.2-Gb/s clock and data recovery/demultiplexer (CDR/DMUX) integrated circuit (IC) implemented in InP heterojunction bipolar transistor (HBT) technology is demonstrated. The IC is fully integrated, requiring only a single external capacitor for complete functionality. The IC exceeds extrapolated SONET/SDH jitter tolerance specifications, operates with an industry-standard +3.3-V power supply, and dissipates 3.3 W.
Keywords :
SONET; bipolar analogue integrated circuits; demultiplexing equipment; optical receivers; phase detectors; phase locked loops; synchronisation; synchronous digital hierarchy; timing jitter; voltage-controlled oscillators; 3.3 V; 3.3 W; 43.2 Gbit/s; HBT technology; PLL loop filter; SONET/SDH specifications; clock and data recovery; demultiplexer IC; extrapolated jitter tolerance specifications; fully integrated; optical communication equipment; optical receiver system; phase detector; ring oscillator topology; single external capacitor; Bipolar integrated circuits; Capacitors; Clocks; Electricity supply industry; Heterojunction bipolar transistors; Indium phosphide; Integrated circuit technology; Jitter; SONET; Synchronous digital hierarchy;
Journal_Title :
Solid-State Circuits, IEEE Journal of
DOI :
10.1109/JSSC.2003.818573
