DocumentCode :
842451
Title :
A CMOS field-programmable analog array
Author :
Lee, Edward K F ; Gulak, P. Glenn
Author_Institution :
Dept. of Electr. Eng., Toronto Univ., Ont., Canada
Volume :
26
Issue :
12
fYear :
1991
fDate :
12/1/1991 12:00:00 AM
Firstpage :
1860
Lastpage :
1867
Abstract :
The design details and test results of a field-programmable analog array (FPAA) prototype chip in 1.2-μm CMOS are presented. The analog array is based on subthreshold circuit techniques and consists of a collection of a homogeneous configurable analog blocks (CABs) and an interconnection network. Interconnections between CABs and the analog functions to be implemented in each block are defined by a set of configuration bits loaded serially into an onboard shift register by the user. Macromodels are developed for the analog functions in order to simulate various neural network applications on the field-programmable analog array
Keywords :
CMOS integrated circuits; analogue circuits; neural nets; 1.2 micron; CMOS; configurable analog blocks; field-programmable analog array; interconnection network; macromodels; neural net simulation; neural network applications; onboard shift register; prototype chip; simulation; subthreshold circuit techniques; CMOS technology; Circuit simulation; Circuit testing; Field programmable analog arrays; Field programmable gate arrays; Integrated circuit interconnections; Network topology; Neural networks; Prototypes; Shift registers;
fLanguage :
English
Journal_Title :
Solid-State Circuits, IEEE Journal of
Publisher :
ieee
ISSN :
0018-9200
Type :
jour
DOI :
10.1109/4.104162
Filename :
104162
Link To Document :
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