A CCD programmable image processor and its neural network applications

Author

Chiang, Alice M. ; Chuang, Michael L.

Author_Institution

MIT Lincoln Lab., Lexington, MA, USA

Volume

26

Issue

12

fYear

1991

fDate

12/1/1991 12:00:00 AM

Firstpage

1894

Lastpage

1901

Abstract

A charge coupled device (CCD)-based image processor that performs 2D filtering of a gray-level image with 20 programmable 8-b 7×7 spatial filters is described. The processor consists of an analog input buffer, 49 multipliers, and 49 8-b 20-stage local memories in a 29-mm ² chip area. Better than 99.999% charge transfer efficiency and greater than 42-dB dynamic range have been achieved by the processor, which performs one billion arithmetic operations per second and dissipates less than 1 W when clocked at 10 MHz. The device is also suited for neural networks with local connections and replicated weights. Implementation of a specific neural network, the neocognitron, based on this CCD processor has been simulated. The effect of weight quantization imposed by use of this CCD device on the performance of the neocognitron is presented

Keywords

charge-coupled device circuits; computerised pattern recognition; computerised picture processing; neural nets; two-dimensional digital filters; 1 W; 10 MHz; 2D filtering; 8 bit; 99.999 percent; CCD processor; CCD programmable image processor; analog input buffer; charge transfer efficiency; chip area; dynamic range; gray-level image; local memories; multipliers; neocognitron; neural network applications; weight quantization effect; Arithmetic; Charge coupled devices; Charge transfer; Charge-coupled image sensors; Clocks; Dynamic range; Filtering; Neural networks; Quantization; Spatial filters;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/4.104181

Filename

104181