DocumentCode :
843350
Title :
Analytical and experimental methods for zero-temperature-coefficient biasing of MOS transistors
Author :
Shoucair, F.S.
Author_Institution :
Dept. of Electr. Eng., Brown Univ., Providence, RI, USA
Volume :
25
Issue :
17
fYear :
1989
Firstpage :
1196
Lastpage :
1198
Abstract :
Analytical and experimental results are presented which yield new design insights for VLSI CMOS circuits to be operated over wide temperature ranges (25-250 degrees C). The significant influence of the body voltage on the zero-temperature-coefficient (ZTC) drain current characteristics of MOSFETs is reported and modelled. Results suggest that state-of-the-art VLSI CMOS technologies can be used to design on-chip voltage and current references and therefore a wide class of signal processing IC functions, which are stable over wider temperature ranges than have been achieved to date.
Keywords :
CMOS integrated circuits; VLSI; insulated gate field effect transistors; 25 to 250 degC; MOS transistors; VLSI CMOS circuits; body voltage; drain current characteristics; signal processing IC functions; zero-temperature-coefficient biasing;
fLanguage :
English
Journal_Title :
Electronics Letters
Publisher :
iet
ISSN :
0013-5194
Type :
jour
DOI :
10.1049/el:19890802
Filename :
41951
Link To Document :
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