• DocumentCode
    843388
  • Title

    Novel area-time efficient static CMOS totally self-checking comparator

  • Author

    Lo, Jien-Chung

  • Author_Institution
    Dept. of Electr. Eng., Rhode Island Univ., Kingston, RI, USA
  • Volume
    28
  • Issue
    2
  • fYear
    1993
  • fDate
    2/1/1993 12:00:00 AM
  • Firstpage
    165
  • Lastpage
    168
  • Abstract
    The comparator is an essential element in concurrent error detection (CED). To ensure the correctness of error detection processes, comparators must be totally self-checking (TSC): any single fault occurring in the comparator must be detected by at least one normal input pattern, and before the detection of that fault, no erroneous output must be guaranteed. An area-time efficient static CMOS TSC comparator design is presented. This comparator uses only eight transistors and is totally self-checking with respect to stuck-at, stuck-open, stuck-on, bridging faults, and breaks
  • Keywords
    CMOS integrated circuits; comparators (circuits); error detection; integrated logic circuits; bridging faults; concurrent error detection; static CMOS; stuck-at faults; stuck-on faults; stuck-open faults; totally self-checking comparator; Bridge circuits; Built-in self-test; Circuit faults; Circuit simulation; Delay effects; Digital systems; Error correction; Fault detection; Logic circuits;
  • fLanguage
    English
  • Journal_Title
    Solid-State Circuits, IEEE Journal of
  • Publisher
    ieee
  • ISSN
    0018-9200
  • Type

    jour

  • DOI
    10.1109/4.192049
  • Filename
    192049