DocumentCode :
843595
Title :
A CMOS Tunable Transimpedance Amplifier
Author :
Hwang, Huei-Yan ; Chien, Jun-Chau ; Chen, Tai-Yuan ; Lu, Liang-Hung
Author_Institution :
Dept. of Electr. Eng. & Graduate Inst. of Electron. Eng., Nat. Taiwan Univ., Taipei
Volume :
16
Issue :
12
fYear :
2006
Firstpage :
693
Lastpage :
695
Abstract :
A tunable transimpedance amplifier (TIA) is presented in this letter. By incorporating a mechanism for gain and bandwidth tuning, the TIA can be adjusted to achieve optimum circuit performance with a lowest bit-error-rate (BER) for high-speed applications. The proposed circuit is implemented in a 0.18-mum CMOS process. Consuming a dc power of 34mW from a 2.0-V supply voltage, the fabricated TIA exhibits a variable -3-dB bandwidth from 3.9 to 7.6GHz while maintaining a transimpedance gain of 52dBOmega. With a 7.5-Gb/s 231-1 pseudo-random bit sequence, the measured input sensitivity of the TIA is -19 dBm at a BER of 10-12
Keywords :
CMOS integrated circuits; amplifiers; high-speed techniques; optical receivers; 2.0 V; 3 dB; 3.9 to 7.6 GHz; 34 mW; 52 dB; CMOS transimpedance amplifier; bit error rate; high speed applications; input sensitivity; inter symbol interference; optical receiver; regulated cascade; total integrated noise; transimpedance gain; tunable bandwidth; Bandwidth; Bit error rate; Circuit optimization; Intersymbol interference; Optical amplifiers; Optical receivers; Semiconductor device noise; Semiconductor optical amplifiers; Tunable circuits and devices; Voltage; Bit-error-rate (BER); input sensitivity; intersymbol interference (ISI); optical receiver; regulated cascode; total integrated noise; transimpedance amplifier (TIA); tunable bandwidth;
fLanguage :
English
Journal_Title :
Microwave and Wireless Components Letters, IEEE
Publisher :
ieee
ISSN :
1531-1309
Type :
jour
DOI :
10.1109/LMWC.2006.885641
Filename :
4020313
Link To Document :
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