• DocumentCode
    843667
  • Title

    Fault-tolerant FFT networks

  • Author

    Jou, Jing-yang ; Abraham, Jacob A.

  • Volume
    37
  • Issue
    5
  • fYear
    1988
  • fDate
    5/1/1988 12:00:00 AM
  • Firstpage
    548
  • Lastpage
    561
  • Abstract
    Two concurrent error detection (CED) schemes are proposed for N-point fast Fourier transform (FFT) networks that consists of log2N stages with N/2 two-point butterfly modules for each stage. The method assumes that failures are confined to a single complex multiplier or adder or to one input or output set of lines. Such a fault model covers a broad class of faults. It is shown that only a small overhead ratio, O(2/log2N) of hardware, is required for the networks to obtain fault-secure results in the first scheme. A novel data retry technique is used to locate the faulty modules. Large roundoff errors can be detected and treated in the same manner as functional errors. The retry technique can also distinguish between the roundoff errors and functional errors that are caused by some physical failures. In the second scheme, a time-redundancy method is used to achieve both error detection and location. It is sown that only negligible hardware overhead is required. However, the throughput is reduced to half that of the original system, without both error detection and location, because of the nature of time-redundancy methods
  • Keywords
    automatic testing; digital arithmetic; digital integrated circuits; error analysis; error detection; fast Fourier transforms; fault location; fault tolerant computing; integrated circuit testing; parallel architectures; redundancy; roundoff errors; N-point fast Fourier transform; N/2 two-point butterfly modules; concurrent error detection; data retry technique; error location; fault model; fault tolerant FFT networks; fault-secure results; functional errors; log2N stages; negligible hardware overhead; physical failures; roundoff errors; throughput; time-redundancy method; Discrete Fourier transforms; Fast Fourier transforms; Fault tolerance; Hardware; Helium; Redundancy; Roundoff errors; Signal analysis; Signal processing algorithms; Very large scale integration;
  • fLanguage
    English
  • Journal_Title
    Computers, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9340
  • Type

    jour

  • DOI
    10.1109/12.4606
  • Filename
    4606