Title :
Metal gate-HfO/sub 2/ MOS structures on GaAs substrate with and without Si interlayer
Author :
Ok, Injo ; Kim, Hyoung-Sub ; Zhang, Manhong ; Kang, Chang-Yong ; Rhee, Se Jong ; Choi, Changhwan ; Krishnan, Siddarth A. ; Tackhwi Lee ; Zhu, Feng ; Thareja, Gaurav ; Lee, Jack C.
Author_Institution :
Dept. of Electr. & Comput. Eng., Texas Univ., Austin, TX, USA
fDate :
3/1/2006 12:00:00 AM
Abstract :
In this letter, we studied the effects of post-deposition anneal (PDA) time and Si interface control layer (ICL) on the electrical characteristics of the MOS capacitor with high-/spl kappa/ (HfO/sub 2/) material on GaAs. Thin equivalent oxide thickness (EOT<3 nm) with excellent capacitance-voltage (C-V) characteristics has been obtained. The thickness of the Si ICL and PDA time were correlated with C-V characteristics. It was found that high temperature Si ICL deposition and longer PDA time at 600/spl deg/C improved the C-V shape, leakage current, and especially frequency dispersion (<5%).
Keywords :
MOS capacitors; annealing; gallium arsenide; hafnium compounds; high-k dielectric thin films; silicon; tantalum compounds; 600 C; C-V characteristics; GaAs substrate; MOS capacitor; Si interface control layer; TaN-HfO/sub 2/-Si-GaAs; capacitance-voltage characteristics; frequency dispersion; high-k material; leakage current; metal gate MOS structures; post-deposition anneal time; Annealing; Capacitance-voltage characteristics; Electric variables; Frequency; Gallium arsenide; Hafnium oxide; Leakage current; MOS capacitors; Shape; Temperature; GaAs; HfO; Si; frequency dispersion; interface control layer; leakage current density;
Journal_Title :
Electron Device Letters, IEEE
DOI :
10.1109/LED.2006.870243
